| 1 | |
| 2 | framework for structured design of digital systems in a CAD environment |
| Language: | English |
| 3 | |
| 4 | Investigation into the running in and steady sate wear processes |
| Language: | English |
| 5 | Breakdown and capacitance properties of some two terminal silicon epitaxial device structures |
| 6 | Some problems of field distribution and coupling in striplines |
| Language: | English |
| 7 | |
| 8 | |
| Language: | English |
| 9 | |
| 10 | |
| Language: | English |
| 11 | |
| 12 | Synthesis pf regular VLSI layouts from high level descriptions |
| Language: | English |
| 13 | multilevel associative processor architecture for parallel processing |
| 14 | |
| Language: | English |
| 15 | |
| 16 | |
| Language: | English |
| 17 | Design considerations and performance analysis of CMOS low power circuits |
| 18 | Study and performance analysis of multichannel acoustic echo cancellation |
| Language: | English |
| 19 | |
| 20 | Quality of service based vertical handoff in heterogeneous wireless networks |
| Language: | English |