| 1 | ||
| Researcher: | Praveen, J | |
| Guide: | Murthy, Ramana | |
| University: | Osmania University | |
| Language: | English | |
| 2 | Bist based low transition test pattern generation for minimizing test power in VLSI circuits | |
| Researcher: | Praveen, J. | |
| Guide: | Shanmukha Swamy, M. N. | |
| University: | University of Mysore | |
| Language: | English | |
| Shodhganga | ||
| 3 | ||
| Researcher: | Praveen, J | |
| Guide: | Narasimhamurthy, S K | |
| University: | Kuvempu University, Shimoga | |
| Language: | English | |
| 4 | ||
| Researcher: | Kumar, Syam Praveen J. | |
| Guide: | Rani, Sudha S. | |
| University: | Pondicherry University, Puducherry | |
| Language: | English | |
| Shodhganga | ||