| Type of Material: | Thesis |
| Title: | Bist based low transition test pattern generation for minimizing test power in VLSI circuits |
| Researcher: | Praveen, J. |
| Guide: | Shanmukha Swamy, M. N. |
| Publisher: | University of Mysore |
| Place: | Mysore |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 003 | IN-AhILN | |
| 005 | 2018-08-15 01:23:26 | |
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| 040 | __ | |aMYSR_570005|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aPraveen, J.|eResearcher |
| 245 | __ | |aBist based low transition test pattern generation for minimizing test power in VLSI circuits |
| 260 | __ | |aMysore|bUniversity of Mysore |
| 502 | __ | |bPhD |
| 700 | __ | |aShanmukha Swamy, M. N.|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/204394|yShodhganga |
| 905 | __ | |anotification |
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