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Anna University, Chennai [1]
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Shodhganga [1]
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G, Dhanabalan [1]
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Selvi, S Tamil [1]
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Chennai [1]
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Design of analog input module multiple PID controller and verilog code for ladder diagram using FPGA
Researcher:
G
,
D
h
a
n
a
b
a
l
a
n
Guide:
S
e
l
v
i
,
S
T
a
m
i
l
University:
Anna University
Language:
E
n
g
l
i
s
h
Shodhganga
