| Type of Material: | Thesis |
| Title: | Design of analog input module multiple PID controller and verilog code for ladder diagram using FPGA |
| Researcher: | G, Dhanabalan |
| Guide: | Selvi, S Tamil |
| Publisher: | Anna University |
| Place: | Chennai |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 413810 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 11:46:28 | |
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| 035 | __ | |a(IN-AhILN)th_413810 |
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| 041 | __ | |aeng |
| 100 | __ | |aG, Dhanabalan|eResearcher |
| 245 | __ | |aDesign of analog input module multiple PID controller and verilog code for ladder diagram using FPGA |
| 260 | __ | |aChennai|bAnna University |
| 502 | __ | |bPhD |
| 700 | __ | |aSelvi, S Tamil|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/181484|yShodhganga |
| 905 | __ | |anotification |
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