| 1 | Physical modelling of latch-up characteristics in VLSI CMoS devices |
| Researcher: | Bandyopadhyay, Abhijit |
| Guide: | Bhattacharyya, A BZarabi, M J |
| University: | Indian Institute of Technology-Delhi |
| Language: | English |
| 2 | |
| Researcher: | Akashe, Shyam |
| Guide: | Sharma, Sanjay |
| University: | Thapar University, Patiala |
| Language: | English |
| 3 | Design considerations and performance analysis of CMOS low power circuits |
| Researcher: | Kumar, Manoj |
| Guide: | Arya, SandeepPandey, Sujata |
| University: | Guru Jambheshwar University of Science and Technology, Hisar |
| Language: | English |