| Type of Material: | Thesis |
| Title: | Physical modelling of latch-up characteristics in VLSI CMoS devices |
| Researcher: | Bandyopadhyay, Abhijit |
| Guide: | Bhattacharyya, A B | Zarabi, M J |
| Department: | Department of Electronics Engineering |
| Publisher: | Indian Institute of Technology-Delhi |
| Place: | New Delhi |
| Year: | 1991 |
| Language: | English |
| Subject: | Engineering | Electronics Engineering | Load Frequency Controllers | Power Systems |
| Dissertation/Thesis Note: | PhD |
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| 003 | IN-AhILN | |
| 005 | 2011-01-13 00:00:00 | |
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| 100 | __ | |aBandyopadhyay, Abhijit|eResearcher |
| 110 | __ | |aDepartment of Electronics Engineering|bIndian Institute of Technology-Delhi|dNew Delhi|eIn |
| 245 | __ | |aPhysical modelling of latch-up characteristics in VLSI CMoS devices |
| 260 | __ | |aNew Delhi|bIndian Institute of Technology-Delhi|c1991 |
| 502 | __ | |bPhD |
| 653 | __ | |aEngineering |
| 653 | __ | |aElectronics Engineering |
| 653 | __ | |aLoad Frequency Controllers |
| 653 | __ | |aPower Systems |
| 700 | __ | |aBhattacharyya, A B|eGuide |
| 700 | __ | |aZarabi, M J|eGuide |
| 905 | __ | |anotification |
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