| 1 | intergrated approach to partitioning placement wire routing of computer logic circuit |
| Researcher: | Chaudhuri, Parimal Pal |
| Guide: | Chattopadhyay, A K |
| University: | Indian Institute of Technology |
| Language: | English |
| 2 | Studies on some tunable microelectronic networks design and applications |
| Researcher: | Jana, Parimal Bikash |
| Guide: | Nandi, R |
| University: | Jadavpur University |
| Language: | English |