| 1 | |
| Researcher: | Shriniwas, Prasad |
| Guide: | Pandey, D D |
| University: | Magadh University |
| Language: | English |
| 2 | Development of a VLSI layout design system for standard cell approach |
| Researcher: | Wagle, Shriniwas Dattatraya |
| Guide: | David, S K |
| University: | University of Pune |
| Language: | English |