| Type of Material: | Thesis |
| Title: | Development of a VLSI layout design system for standard cell approach |
| Researcher: | Wagle, Shriniwas Dattatraya |
| Guide: | David, S K |
| Department: | Department of Electronics Science |
| Publisher: | University of Pune |
| Place: | Pune |
| Year: | 1990 |
| Language: | English |
| Subject: | Physics | Electronics |
| Dissertation/Thesis Note: | PhD |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 149783 | |
| 003 | IN-AhILN | |
| 005 | 2011-01-13 00:00:00 | |
| 008 | __ | 901231t1990||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_149783 |
| 040 | __ | |aPUNE_411007|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aWagle, Shriniwas Dattatraya|eResearcher |
| 110 | __ | |aDepartment of Electronics Science|bUniversity of Pune|dPune|eIn |
| 245 | __ | |aDevelopment of a VLSI layout design system for standard cell approach |
| 260 | __ | |aPune|bUniversity of Pune|c1990 |
| 502 | __ | |bPhD |
| 653 | __ | |aPhysics |
| 653 | __ | |aElectronics |
| 700 | __ | |aDavid, S K|eGuide |
| 905 | __ | |anotification |
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