| 1 | intergrated approach to partitioning placement wire routing of computer logic circuit | |
| Researcher: | Chaudhuri, Parimal Pal | |
| Guide: | Chattopadhyay, A K | |
| University: | Indian Institute of Technology | |
| Language: | English | |
| 2 | ||
| Researcher: | Kar, Parimal Chandra | |
| Guide: | Goswami, M C | |
| University: | Gauhati University | |
| Language: | English | |
| Shodhganga | ||