| Type of Material: | Thesis |
| Title: | Verification of digital systems using linear time temporal logic |
| Researcher: | Gangadharan, Venkatesh |
| Guide: | Shyamsundar, R K |
| Department: | Department of Electronics Engineering |
| Publisher: | Tata Institute of Fundamental Research |
| Place: | Mumbai |
| Year: | 1988 |
| Language: | English |
| Subject: | Engineering | Electronics Engineering | Computer | Computer Theory |
| Dissertation/Thesis Note: | PhD |
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