Title : Logic minimization algorithms for VLSI applications

Type of Material: Thesis
Title: Logic minimization algorithms for VLSI applications
Researcher: Gurunath, B
Guide: Shivaprasad, A P
Biswas, N N
Department: Department of Electrical Communication Engineering
Publisher: Indian Institute of Science
Place: Bangalore
Year: 1988
Language: English
Subject: Engineering
Electronics Engineering
Microelectronics
Intergrated Circuits
Dissertation/Thesis Note: PhD

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035__|a(IN-AhILN)th_71782
040__|aIISC_560012|dIN-AhILN
041__|aeng
100__|aGurunath, B|eResearcher
110__|aDepartment of Electrical Communication Engineering|bIndian Institute of Science|dBangalore|eIn
245__|aLogic minimization algorithms for VLSI applications
260__|aBangalore|bIndian Institute of Science|c1988
502__|bPhD
653__|aEngineering
653__|aElectronics Engineering
653__|aMicroelectronics
653__|aIntergrated Circuits
700__|aShivaprasad, A P|eGuide
700__|aBiswas, N N|eGuide
905__|anotification

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