| Type of Material: | Thesis |
| Title: | Algorithms Architecture and Fpga Implementation of Video Encoder with Enhanced Features |
| Researcher: | Ramachandran, S |
| Department: | Department of Computer Science and Engineering |
| Publisher: | Indian Institute of Technology-Madras |
| Place: | Chennai |
| Year: | 2002 |
| Language: | English |
| Subject: | Engineering Science | Computer Science and Engineering |
| Accession No: | Web iitm |
| Dissertation/Thesis Note: | PhD |
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| 001 | 54292 | |
| 003 | IN-AhILN | |
| 005 | 2011-01-13 00:00:00 | |
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| 100 | __ | |aRamachandran, S|eResearcher |
| 110 | __ | |aDepartment of Computer Science and Engineering|bIndian Institute of Technology-Madras|dChennai|eIn |
| 245 | __ | |aAlgorithms Architecture and Fpga Implementation of Video Encoder with Enhanced Features |
| 260 | __ | |aChennai|bIndian Institute of Technology-Madras|c2002 |
| 502 | __ | |bPhD |
| 653 | __ | |aEngineering Science |
| 653 | __ | |aComputer Science and Engineering |
| 852 | __ | |pWeb iitm |
| 905 | __ | |anotification |
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