| Type of Material: | Thesis |
| Title: | FPGA implementation of 8th order delta sigma modulation with reconfigurable mutliple bandwidth using truncated method |
| Researcher: | S R, Arun Raj |
| Guide: | Murthy, G Ramana |
| Department: | Department of Engineering and Technology |
| Publisher: | Alliance University |
| Place: | Bangalore |
| Year: | 2026 |
| Language: | English |
| Subject: | Science and Technology | Computer Science and Information Technology | Engineering and Technology |
| Dissertation/Thesis Note: | PhD; Department of Engineering and Technology, Alliance University, Bangalore; 2026 |
| 003 | IN-AhILN | |
| 005 | 2026-09-02 11:12:07 | |
| 008 | __ | 260902t2026||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_462634 |
| 040 | __ | |dIN-AhILN|aALUN_562106 |
| 041 | __ | |aeng |
| 100 | __ | |eResearcher|aS R, Arun Raj |
| 110 | __ | |aDepartment of Engineering and Technology|0U-0213|dBangalore|bAlliance University|ein |
| 245 | __ | |aFPGA implementation of 8th order delta sigma modulation with reconfigurable mutliple bandwidth using truncated method |
| 260 | __ | |aBangalore|c2026|bAlliance University |
| 502 | __ | |bPhD|cDepartment of Engineering and Technology, Alliance University, Bangalore|d2026 |
| 518 | __ | |oDate of Notification|d2026-08-10 |
| 650 | __ | |aComputer Science and Information Technology|2UGC |
| 650 | __ | |aEngineering and Technology|2AIU |
| 653 | __ | |aScience and Technology |
| 700 | __ | |aMurthy, G Ramana|eGuide |
| 905 | __ | |anotification |
User Feedback Comes Under This section.