Type of Material: | Thesis |
Title: | Desingn and analysis of mem- elements emulator using analog building blocks |
Researcher: | Nisha |
Guide: | Rai, Shireesh Kumar | Pandey, Rishikesh |
Department: | Electronics & Communication engineering |
Publisher: | Thapar University, Patiala |
Place: | Patiala |
Year: | 2024 |
Language: | English |
Subject: | Electronics and communication Engineering | Electronics and Communication Engineering | Engineering and Technology |
Dissertation/Thesis Note: | PhD; Electronics & Communication engineering, Thapar University, Patiala, Patiala; 2024; 901806018 |
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001 | 457300 | |
003 | IN-AhILN | |
005 | 2025-01-21 16:15:25 | |
008 | __ | 250121t2024||||ii#||||g|m||||||||||eng|| |
035 | __ | |a(IN-AhILN)th_457300 |
040 | __ | |aTIET_147001|dIN-AhILN |
041 | __ | |aeng |
100 | __ | |aNisha|eResearcher |
110 | __ | |aElectronics & Communication engineering|bThapar University, Patiala|dPatiala|ein|0U-0385 |
245 | __ | |aDesingn and analysis of mem- elements emulator using analog building blocks |
260 | __ | |aPatiala|bThapar University, Patiala|c2024 |
502 | __ | |bPhD|cElectronics & Communication engineering, Thapar University, Patiala, Patiala|d2024|o901806018 |
518 | __ | |oDate of Notification|d2024-12-30 |
518 | __ | |oDate of Viva-voce|d2024-12-26 |
650 | __ | |aElectronics and Communication Engineering|2UGC |
650 | __ | |aEngineering and Technology|2AIU |
653 | __ | |aElectronics and communication Engineering |
700 | __ | |aRai, Shireesh Kumar |
700 | __ | |aPandey, Rishikesh |
905 | __ | |anotification |
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