Title : Pipelining strategies for VLSI low power consumption designs

Type of Material: Thesis
Title: Pipelining strategies for VLSI low power consumption designs
Researcher: Eshack, Ansiya
Guide: Krishnakumar, S
Department: School of Technology and Applied Sciences
Publisher: Mahatma Gandhi University, Kottayam
Place: Kottayam
Year: 2020
Language: English
Subject: Engineering
Engineering and Technology
Engineering Electrical and Electronic
Electrical Engineering
Engineering and Technology
Dissertation/Thesis Note: PhD; School of Technology and Applied Sciences, Mahatma Gandhi University, Kottayam, Kottayam; 2020
Fulltext: Shodhganga

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035__|a(IN-AhILN)th_456462
040__|aMGND_686560|dIN-AhILN
041__|aeng
100__|aEshack, Ansiya|eResearcher
110__|aSchool of Technology and Applied Sciences|bMahatma Gandhi University, Kottayam|dKottayam|ein|0U-0262
245__|aPipelining strategies for VLSI low power consumption designs
260__|aKottayam|bMahatma Gandhi University, Kottayam|c2020
300__|axxi, 188p.|dNone
500__|aInchapter Bibliography, Appendices p.187-188
502__|cSchool of Technology and Applied Sciences, Mahatma Gandhi University, Kottayam, Kottayam|d2020|bPhD
518__|oDate of Award|d2021
518__|oDate of Registration|d2015
650__|aElectrical Engineering|2UGC
650__|2AIU|aEngineering and Technology
653__|aEngineering
653__|aEngineering and Technology
653__|aEngineering Electrical and Electronic
700__|eGuide|aKrishnakumar, S
856__|uhttp://shodhganga.inflibnet.ac.in/handle/10603/525540|yShodhganga
905__|afromsg

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