| Type of Material: | Thesis |
| Title: | Verification and Validation of Temporal Models in Safety Critical Software Development Cycle A Unified Modeling Language Approach |
| Researcher: | Kochaleema, K H |
| Guide: | Santhosh Kumar, G |
| Department: | Department of Computer Science |
| Publisher: | Cochin University of Science & Technology, Cochin |
| Place: | Cochin |
| Year: | 2022 |
| Language: | English |
| Subject: | Computational Tree Logic Model | Computer Science | Computer Science Software Engineering | Engineering and Technology | UML Artefacts | Computer Science and Information Technology | Engineering and Technology |
| Dissertation/Thesis Note: | PhD; Department of Computer Science, Cochin University of Science & Technology, Cochin, Cochin; 2022 |
| Fulltext: | Shodhganga |
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| 005 | 2024-10-10 12:23:05 | |
| 008 | __ | 241010t2022||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_456460 |
| 040 | __ | |aCUST_682022|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aKochaleema, K H|eResearcher |
| 110 | __ | |aDepartment of Computer Science|bCochin University of Science & Technology, Cochin|dCochin|ein|0U-0253 |
| 245 | __ | |aVerification and Validation of Temporal Models in Safety Critical Software Development Cycle A Unified Modeling Language Approach |
| 260 | __ | |aCochin|bCochin University of Science & Technology, Cochin|c2022 |
| 300 | __ | |a196|dDVD |
| 502 | __ | |cDepartment of Computer Science, Cochin University of Science & Technology, Cochin, Cochin|d2022|bPhD |
| 518 | __ | |d2023|oDate of Award |
| 518 | __ | |oDate of Registration|d2016 |
| 520 | __ | |aUnified Modeling Language (UML) is a widely accepted modelling language with versatile capabilities for visualising, specifying, constructing, and documenting software systems. Currently, UML models are used for modelling all kinds of systems, including real-time and embedded systems. These systems, especially those used in safety-critical applications, have distinct features like timing constraints, safety characteristics and asynchronous interaction with the operating environment. The timeliness requirements, concurrent event handling, and high availability and dependability attributes make embedded system software design too complex for the designer. Assurance of these features determines the successful operation of embedded systems used in safety and mission-critical applications. Verifying the UML model before implementation is binding in such cases, primarily to avoid unforeseen behaviour during operation leading to unexpected system states and error conditions. This error states, if conceived duly du |
| 650 | __ | |aComputer Science and Information Technology|2UGC |
| 650 | __ | |aEngineering and Technology|2AIU |
| 653 | __ | |aComputational Tree Logic Model |
| 653 | __ | |aComputer Science |
| 653 | __ | |aComputer Science Software Engineering |
| 653 | __ | |aEngineering and Technology |
| 653 | __ | |aUML Artefacts |
| 700 | __ | |eGuide|aSanthosh Kumar, G |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/493530|yShodhganga |
| 905 | __ | |afromsg |
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