| Type of Material: | Thesis |
| Title: | Design and performance analysis of some analog VLSI circuits using curent mode building blocks |
| Researcher: | Shukla, Garima |
| Guide: | Paul, Sajal K. |
| Department: | Electronic Engineering |
| Publisher: | Indian School of Mines, Dhanbad |
| Place: | Dhanbad |
| Year: | 2024 |
| Language: | English |
| Subject: | Electronic Engineering | Electrical Engineering | Engineering and Technology |
| Dissertation/Thesis Note: | PhD; Electronic Engineering, Indian School of Mines, Dhanbad, Dhanbad; 2024; 17DR000652 |
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| 001 | 454469 | |
| 003 | IN-AhILN | |
| 005 | 2024-09-13 10:47:40 | |
| 008 | __ | 240912t2024||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_454469 |
| 040 | __ | |aISMD_826004|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aShukla, Garima|eResearcher |
| 110 | __ | |aElectronic Engineering|bIndian School of Mines, Dhanbad|dDhanbad|ein|0U-0205 |
| 245 | __ | |aDesign and performance analysis of some analog VLSI circuits using curent mode building blocks |
| 260 | __ | |aDhanbad|bIndian School of Mines, Dhanbad|c2024 |
| 502 | __ | |bPhD|cElectronic Engineering, Indian School of Mines, Dhanbad, Dhanbad|d2024|o17DR000652 |
| 518 | __ | |oDate of Notification|d2024-06-06 |
| 650 | __ | |aElectrical Engineering|2UGC |
| 650 | __ | |aEngineering and Technology|2AIU |
| 653 | __ | |aElectronic Engineering |
| 700 | __ | |eGuide|aPaul, Sajal K. |
| 905 | __ | |anotification |
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