| Type of Material: | Thesis |
| Title: | A low power delay product hybrid CMOS full adder design for chain and tree structures and its characterization |
| Researcher: | Mewada, Manan Rajanikant |
| Guide: | Zaveri, Mazad S |
| Department: | School of Engineering and Applied Science |
| Publisher: | Ahmedabad University |
| Place: | Ahmedabad |
| Year: | 2019 |
| Language: | English |
| Subject: | Arithmetic and Logic Unit | Engineering | Engineering and Technology | Instruments and Instrumentation | Portable electronic devices | Processors | Engineering and Technology |
| Dissertation/Thesis Note: | PhD; School of Engineering and Applied Science, Ahmedabad University, Ahmedabad |
| Fulltext: | Shodhganga |
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| 001 | 448736 | |
| 003 | IN-AhILN | |
| 005 | 2023-07-26 10:42:18 | |
| 008 | __ | 230726t2019||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_448736 |
| 040 | __ | |aAHUN_380009|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aMewada, Manan Rajanikant|eResearcher |
| 110 | __ | |aSchool of Engineering and Applied Science|bAhmedabad University|dAhmedabad|ein |
| 245 | __ | |aA low power delay product hybrid CMOS full adder design for chain and tree structures and its characterization |
| 260 | __ | |aAhmedabad|bAhmedabad University|c2019 |
| 300 | __ | |a110 p.|dNone|c- |
| 500 | __ | |abibliography p.76-82 |
| 502 | __ | |cSchool of Engineering and Applied Science, Ahmedabad University, Ahmedabad|bPhD |
| 520 | __ | |afile attached |
| 650 | __ | |aEngineering and Technology|2AIU |
| 653 | __ | |aArithmetic and Logic Unit |
| 653 | __ | |aEngineering |
| 653 | __ | |aEngineering and Technology |
| 653 | __ | |aInstruments and Instrumentation |
| 653 | __ | |aPortable electronic devices |
| 653 | __ | |aProcessors |
| 700 | __ | |aZaveri, Mazad S|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/317951|yShodhganga |
| 905 | __ | |afromsg |
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