| Type of Material: | Thesis |
| Title: | Modeling Deep Submicron MOS Transistor for Ultra Low Power Analog and RF circuit Design |
| Researcher: | Singh, Kirmender |
| Guide: | Jain, R. C. and Bhattacharyya |
| Publisher: | Jaypee Institute of Information Technology |
| Place: | Noida |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 436151 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-15 01:40:23 | |
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| 035 | __ | |a(IN-AhILN)th_436151 |
| 040 | __ | |aJUIT_173215|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aSingh, Kirmender|eResearcher |
| 245 | __ | |aModeling Deep Submicron MOS Transistor for Ultra Low Power Analog and RF circuit Design |
| 260 | __ | |aNoida|bJaypee Institute of Information Technology |
| 502 | __ | |bPhD |
| 700 | __ | |aJain, R. C. and Bhattacharyya|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/208513|yShodhganga |
| 905 | __ | |anotification |
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