| Type of Material: | Thesis |
| Title: | Ultra low power digital VLSI Design Design Implementation and Analysis of Low Power High Speed SRAM |
| Researcher: | NIDHI TIWARI |
| Guide: | YOGESH CHANDRA SHARMA, K J RANGRA |
| Publisher: | Vivekananda Global University |
| Place: | Jaipur |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 435637 | |
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| 005 | 2018-08-15 01:37:40 | |
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| 035 | __ | |a(IN-AhILN)th_435637 |
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| 041 | __ | |aeng |
| 100 | __ | |aNIDHI TIWARI|eResearcher |
| 245 | __ | |aUltra low power digital VLSI Design Design Implementation and Analysis of Low Power High Speed SRAM |
| 246 | __ | |aUltra-low power digital VLSI Design: Design, Implementation and Analysis of Low Power High-Speed SRAM |
| 260 | __ | |aJaipur|bVivekananda Global University |
| 502 | __ | |bPhD |
| 700 | __ | |aYOGESH CHANDRA SHARMA, K J RANGRA|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/207858|yShodhganga |
| 905 | __ | |anotification |
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