| Type of Material: | Thesis |
| Title: | Power and performance aware on chip interconnection architectures for many core systems |
| Researcher: | Mondal, Hemanta Kumar |
| Guide: | Deb, Sujay |
| Publisher: | Indraprastha Institute of Information Technology, Delhi (IIIT-Delhi) |
| Place: | Delhi |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 415722 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 11:54:43 | |
| 008 | __ | 180814t####||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_415722 |
| 040 | __ | |aIIIT_110020|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aMondal, Hemanta Kumar|eResearcher |
| 245 | __ | |aPower and performance aware on chip interconnection architectures for many core systems |
| 260 | __ | |aDelhi|bIndraprastha Institute of Information Technology, Delhi (IIIT-Delhi) |
| 502 | __ | |bPhD |
| 520 | __ | |aFile attached |
| 700 | __ | |aDeb, Sujay|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/183750|yShodhganga |
| 905 | __ | |anotification |
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