| Type of Material: | Thesis |
| Title: | FPGA implementation of AES using montgomery multiplier and 2D DWT processor for secure image encoding |
| Researcher: | A, Dattathreya K |
| Guide: | Kashwan, K R |
| Publisher: | Anna University |
| Place: | Chennai |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 413645 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 11:45:54 | |
| 008 | __ | 180814t####||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_413645 |
| 040 | __ | |aANNA_600025|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aA, Dattathreya K|eResearcher |
| 245 | __ | |aFPGA implementation of AES using montgomery multiplier and 2D DWT processor for secure image encoding |
| 260 | __ | |aChennai|bAnna University |
| 502 | __ | |bPhD |
| 700 | __ | |aKashwan, K R|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/181318|yShodhganga |
| 905 | __ | |anotification |
User Feedback Comes Under This section.