| Type of Material: | Thesis |
| Title: | Vague Logic Oriented CPU Schedulers |
| Researcher: | Raheja, Supriya |
| Guide: | Dadhich, Reena and Rajpal |
| Publisher: | Banasthali Univesity |
| Place: | Banasthali |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 377736 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 08:36:43 | |
| 008 | __ | 180814t####||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_377736 |
| 040 | __ | |aBANV_304022|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aRaheja, Supriya|eResearcher |
| 245 | __ | |aVague Logic Oriented CPU Schedulers |
| 260 | __ | |aBanasthali|bBanasthali Univesity |
| 502 | __ | |bPhD |
| 700 | __ | |aDadhich, Reena and Rajpal|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/138598|yShodhganga |
| 905 | __ | |anotification |
User Feedback Comes Under This section.