| Type of Material: | Thesis |
| Title: | MIL STD ONE FIVE FIVE THREE BUS PROTOCOLS AND ARM IP CORE IMPLEMENTATION IN FPGA TO REALISE SYSTEM ON CHIP SOC DEVICE ALGORITHMS AND ANALYSIS |
| Researcher: | Padmanabham, K |
| Guide: | Nagabhushan, Raju K |
| Publisher: | Sri Krishnadevaraya University |
| Place: | Anantapur |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 371230 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 08:03:37 | |
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| 035 | __ | |a(IN-AhILN)th_371230 |
| 040 | __ | |aSKUN_515003|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aPadmanabham, K|eResearcher |
| 245 | __ | |aMIL STD ONE FIVE FIVE THREE BUS PROTOCOLS AND ARM IP CORE IMPLEMENTATION IN FPGA TO REALISE SYSTEM ON CHIP SOC DEVICE ALGORITHMS AND ANALYSIS |
| 260 | __ | |aAnantapur|bSri Krishnadevaraya University |
| 502 | __ | |bPhD |
| 700 | __ | |aNagabhushan, Raju K|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/130646|yShodhganga |
| 905 | __ | |anotification |
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