| Type of Material: | Thesis |
| Title: | Certain investigations on the performance and hardware implementation of scheduling algorithms for packet switches in high speed networks |
| Researcher: | Shanthi, G |
| Guide: | Shanmugam, A |
| Publisher: | Bharathiar University |
| Place: | Coimbatore |
| Language: | English |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
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| 001 | 361041 | |
| 003 | IN-AhILN | |
| 005 | 2018-08-14 07:14:34 | |
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| 035 | __ | |a(IN-AhILN)th_361041 |
| 040 | __ | |aBRTR_641046|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aShanthi, G|eResearcher |
| 245 | __ | |aCertain investigations on the performance and hardware implementation of scheduling algorithms for packet switches in high speed networks |
| 260 | __ | |aCoimbatore|bBharathiar University |
| 502 | __ | |bPhD |
| 700 | __ | |aShanmugam, A|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/117930|yShodhganga |
| 905 | __ | |anotification |
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