| Type of Material: | Thesis |
| Title: | Design of multi-valued logic circuits/ digital building blocks |
| Researcher: | Patel, K S Vasundara |
| Guide: | Gurumurthy, K S |
| Department: | Department of Electronics Engineering |
| Publisher: | Bangalore University, Bengaluru |
| Place: | Bangalore |
| Year: | 2012 |
| Language: | Arabic |
| Subject: | Electronics Engineering |
| Dissertation/Thesis Note: | PhD |
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| 001 | 265385 | |
| 003 | IN-AhILN | |
| 005 | 2019-05-28 05:34:56 | |
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| 035 | __ | |a(IN-AhILN)th_265385 |
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| 041 | __ | |aara |
| 100 | __ | |aPatel, K S Vasundara|eResearcher |
| 110 | __ | |aDepartment of Electronics Engineering|bBangalore University, Bengaluru|dBangalore |
| 245 | __ | |aDesign of multi-valued logic circuits/ digital building blocks |
| 260 | __ | |aBangalore|bBangalore University, Bengaluru|c2012 |
| 502 | __ | |bPhD |
| 518 | __ | |oDate of Notification|d2012 |
| 653 | __ | |aElectronics Engineering |
| 700 | __ | |aGurumurthy, K S|eGuide |
| 905 | __ | |anotification |
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