| Type of Material: | Thesis |
| Title: | Design and performance evaluation of multistage interconnection networks |
| Researcher: | Rinkle Rani |
| Guide: | Kaur, Lakhwinder |
| Department: | University College of Engineering |
| Publisher: | Punjabi University |
| Place: | Patiala |
| Year: | 02/11/2010 |
| Language: | English |
| Subject: | Computer science | Computer engineering | Computing systems | Vlsi circuits | Computer networking |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 261168 | |
| 003 | IN-AhILN | |
| 005 | 2013-12-05 05:46:12 | |
| 008 | __ | 111010t2010||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_261168 |
| 040 | __ | |aPJBI_147002|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aRinkle Rani|eResearcher |
| 110 | __ | |aUniversity College of Engineering|bPunjabi University|dPatiala |
| 245 | __ | |aDesign and performance evaluation of multistage interconnection networks |
| 260 | __ | |aPatiala|bPunjabi University|c02/11/2010 |
| 502 | __ | |bPhD |
| 518 | __ | |oDate of Notification|d2010-11-02 |
| 520 | __ | |aMost of today├óÔé¼┼©s computing systems, ranging from large parallel systems and high performance clusters to a single chip System-on-Chip (SoC), that need communication among multiple constituents, use interconnection networks. Examples of interconnect |
| 653 | __ | |aComputer science |
| 653 | __ | |aComputer engineering |
| 653 | __ | |aComputing systems |
| 653 | __ | |aVlsi circuits |
| 653 | __ | |aComputer networking |
| 700 | __ | |aKaur, Lakhwinder|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/2878|yShodhganga |
| 905 | __ | |anotification |
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