Type of Material: | Thesis |
Title: | Design and synthesis of efficient MAC architectures for high speed decimal processor |
Researcher: | James, Rekha K |
Guide: | Jacob, K Poulose |
Department: | Department of Computer Science |
Publisher: | Cochin University of Science and Technology |
Place: | Cochin |
Year: | 04/01/2010 |
Language: | English |
Subject: | Computer sciences | High speed decimal processor |
Dissertation/Thesis Note: | PhD |
Fulltext: | Shodhganga |
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100 | __ | |aJames, Rekha K|eResearcher |
110 | __ | |aDepartment of Computer Science|bCochin University of Science and Technology|dCochin |
245 | __ | |aDesign and synthesis of efficient MAC architectures for high speed decimal processor |
260 | __ | |aCochin|bCochin University of Science and Technology|c04/01/2010 |
502 | __ | |bPhD |
518 | __ | |oDate of Notification|d2010-01-04 |
653 | __ | |aComputer sciences |
653 | __ | |aHigh speed decimal processor |
700 | __ | |aJacob, K Poulose|eGuide |
856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/8623|yShodhganga |
905 | __ | |anotification |
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