| Type of Material: | Thesis |
| Title: | An error localization validation and optimization tool for embedded code augmentation an architecture oriented approach |
| Researcher: | Chacko, Mariamma |
| Guide: | Jacob, K Poulose |
| Department: | Department of Computer Science |
| Publisher: | Cochin University of Science and Technology |
| Place: | Cochin |
| Year: | 22/08/2011 |
| Language: | English |
| Subject: | Computer sciences | Programmable system on chip | Embedded system | Fault localization techniques |
| Dissertation/Thesis Note: | PhD |
| Fulltext: | Shodhganga |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 258436 | |
| 003 | IN-AhILN | |
| 005 | 2013-12-04 12:42:59 | |
| 008 | __ | 130109t2011||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_258436 |
| 040 | __ | |aCUST_682022|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aChacko, Mariamma|eResearcher |
| 110 | __ | |aDepartment of Computer Science|bCochin University of Science and Technology|dCochin |
| 245 | __ | |aAn error localization validation and optimization tool for embedded code augmentation an architecture oriented approach |
| 260 | __ | |aCochin|bCochin University of Science and Technology|c22/08/2011 |
| 502 | __ | |bPhD |
| 518 | __ | |oDate of Notification|d2011-08-22 |
| 520 | __ | |aIncluded |
| 653 | __ | |aComputer sciences |
| 653 | __ | |aProgrammable system on chip |
| 653 | __ | |aEmbedded system |
| 653 | __ | |aFault localization techniques |
| 700 | __ | |aJacob, K Poulose|eGuide |
| 856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/6244|yShodhganga |
| 905 | __ | |anotification |
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