Type of Material: | Thesis |
Title: | Design of robust sub-threshold circuits forultra low power moderate throughput applications |
Researcher: | Pable, Sachin Dattatray |
Guide: | Mohd. Hasan |
Department: | Department of Electronics Engineering |
Publisher: | Aligarh Muslim University |
Place: | Aligarh |
Year: | 2012 |
Language: | English |
Subject: | Electronics engineering | Technology scaling | Deep nanometer era | Power consumption | Routing switch box design | Global interconnects |
Dissertation/Thesis Note: | PhD |
Fulltext: | Shodhganga |
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035 | __ | |a(IN-AhILN)th_256862 |
040 | __ | |aAMUL_202002|dIN-AhILN |
041 | __ | |aeng |
100 | __ | |aPable, Sachin Dattatray|eResearcher |
110 | __ | |aDepartment of Electronics Engineering|bAligarh Muslim University|dAligarh |
245 | __ | |aDesign of robust sub-threshold circuits forultra low power moderate throughput applications |
260 | __ | |aAligarh|bAligarh Muslim University|c2012 |
502 | __ | |bPhD |
518 | __ | |oDate of Notification|d2012 |
520 | __ | |aThere are two sources of power consumption in CMOS namely dynamic and leakage. The dynamic power in CMOS is a quadratic function of the supply voltage and the leakage power is its exponential function. Hence, the most effective way to reduce the power c |
653 | __ | |aElectronics engineering |
653 | __ | |aTechnology scaling |
653 | __ | |aDeep nanometer era |
653 | __ | |aPower consumption |
653 | __ | |aRouting switch box design |
653 | __ | |aGlobal interconnects |
700 | __ | |aMohd. Hasan|eGuide |
856 | __ | |uhttp://shodhganga.inflibnet.ac.in/handle/10603/11274|yShodhganga |
905 | __ | |anotification |
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