| Type of Material: | Thesis |
| Title: | Bit-loading algorithms with power management for ADSL/VDSL systems |
| Researcher: | Padmaja, K V |
| Guide: | Ravishankar, S |
| Department: | RVCE |
| Publisher: | Visvesvaraya Technological University |
| Place: | Belgaum |
| Year: | 2011 |
| Language: | Arabic |
| Subject: | Electrical engineering | Electronics engineering | Bit loading algorithms | Power management |
| Dissertation/Thesis Note: | PhD |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 249452 | |
| 003 | IN-AhILN | |
| 005 | 2019-05-28 05:02:47 | |
| 008 | __ | 120904t2011||||ii#||||g|m||||||||||ara|| |
| 035 | __ | |a(IN-AhILN)th_249452 |
| 040 | __ | |aVITU_590018|dIN-AhILN |
| 041 | __ | |aara |
| 100 | __ | |aPadmaja, K V|eResearcher |
| 110 | __ | |aRVCE|bVisvesvaraya Technological University|dBangalore |
| 245 | __ | |aBit-loading algorithms with power management for ADSL/VDSL systems |
| 260 | __ | |aBelgaum|bVisvesvaraya Technological University|c2011 |
| 502 | __ | |bPhD |
| 653 | __ | |aElectrical engineering |
| 653 | __ | |aElectronics engineering |
| 653 | __ | |aBit loading algorithms |
| 653 | __ | |aPower management |
| 700 | __ | |aRavishankar, S|eGuide |
| 905 | __ | |anotification |
User Feedback Comes Under This section.