Title : Scalable low energy register file architectures for VLIW processors

Type of Material: Thesis
Title: Scalable low energy register file architectures for VLIW processors
Researcher: Goel, Neeraj
Guide: Kumar, Anshul
Panda, P R
Department: Department of Computer Science & Engineering
Publisher: Indian Institute of Technology Delhi
Place: New Delhi
Year: 2012
Language: English
Subject: Computer science
Dissertation/Thesis Note: PhD

00000000ntm a2200000ua 4500
001244778
003IN-AhILN
0052012-04-23 11:21:58
008__120423t2012||||ii#||||g|m||||||||||eng||
035__|a(IN-AhILN)th_244778
040__|aIITD_110016|dIN-AhILN
041__|aeng
100__|aGoel, Neeraj|eResearcher
110__|aDepartment of Computer Science & Engineering|bIndian Institute of Technology,Delhi|dNew Delhi
245__|aScalable low energy register file architectures for VLIW processors
260__|aNew Delhi|bIndian Institute of Technology Delhi|c2012
502__|bPhD
653__|aComputer science
700__|aKumar, Anshul|eGuide
700__|aPanda, P R|eGuide
905__|anotification

User Feedback Comes Under This section.