Title : Dynamically reconfigurable bitparallel pipelined embedded architecture for high speed signal processing

Type of Material: Thesis
Title: Dynamically reconfigurable bitparallel pipelined embedded architecture for high speed signal processing
Researcher: Ramadass, N
Guide: Perinbam, J Raja Paul
Department: Department of Information and Communication Engineering
Publisher: Anna University
Place: Chennai
Year: 2009
Language: English
Subject: Information & Communication Engineering
Dissertation/Thesis Note: PhD

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