| Type of Material: | Thesis |
| Title: | computer architecture based on maximum bit utilisation |
| Researcher: | Chauhan, Ranjeet Singh |
| Guide: | Mishra, H C |
| Department: | Information Processing Centre |
| Publisher: | Birla Institute of Technology and Science |
| Place: | Pilani |
| Year: | 1979 |
| Language: | English |
| Subject: | Engineering | Electronics Engineering | Computer |
| Dissertation/Thesis Note: | PhD |
| 000 | 00000ntm a2200000ua 4500 | |
| 001 | 117481 | |
| 003 | IN-AhILN | |
| 005 | 2011-01-13 00:00:00 | |
| 008 | __ | 791231t1979||||ii#||||g|m||||||||||eng|| |
| 035 | __ | |a(IN-AhILN)th_117481 |
| 040 | __ | |aBITS_333031|dIN-AhILN |
| 041 | __ | |aeng |
| 100 | __ | |aChauhan, Ranjeet Singh|eResearcher |
| 110 | __ | |aInformation Processing Centre|bBirla Institute of Technology and Science|dPilani|eIn |
| 245 | __ | |acomputer architecture based on maximum bit utilisation |
| 260 | __ | |aPilani|bBirla Institute of Technology and Science|c1979 |
| 502 | __ | |bPhD |
| 653 | __ | |aEngineering |
| 653 | __ | |aElectronics Engineering |
| 653 | __ | |aComputer |
| 700 | __ | |aMishra, H C|eGuide |
| 905 | __ | |anotification |
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