| 1 | Exploring register file and memory organisation in Asip synthesis |
| Researcher: | Jain, Manoj Kumar |
| Guide: | Anshul KumarBalakrishnan, M |
| University: | Indian institute of Technology |
| Language: | English |
| 2 | A new approach for evaluation of routingarchitecutres of multi FPGA boards |
| Researcher: | Jain, Sushil Chandra |
| Guide: | Anshul KumarShashi Kumar |
| University: | Andhra University |
| Language: | English |
| 3 | versatile data path synthesis approach based on heuristic search |
| Researcher: | Alok Kumar |
| Guide: | Anshul Kumar |
| University: | Indian Institute of Technology-delhi |
| Language: | English |
| 4 | Synthesis pf regular VLSI layouts from high level descriptions |
| Researcher: | Ramayya, Kumar |
| Guide: | Anshul KumarPrasads |
| University: | Indian Institute of Technology-delhi |
| Language: | English |